dma_cb(D4)

dma_cb -- DMA command block structure

Syntax

   #include <sys/types.h>
   #include <sys/dma.h>
   #include <sys/ddi.h>

Description

The DMA command block structure is used to control a DMA operation on an ISA, EISA, or MCA DMA channel.

Usage

Each DMA operation requested by a driver is controlled by a command block structure whose fields specify the operation to occur.

A number of fields of the DMA control block come in pairs: one for the requestor and one for the target. The requestor is the hardware device that is requesting the DMA operation, while the target is the target of the operation. The typical case is one in which the requestor is an I/O device and the target is memory.

DMA command block structures should only be allocated via dma_get_cb(D3). Although drivers may access the structure members listed below, they should not make any assumptions about the size of the structure or the contents of other fields in the structure.

Structure definitions

The dma_cb structure contains the following members:

   struct dma_buf	*targbufs;	/* list of target data buffers */
   struct dma_buf	*reqrbufs;	/* list of requestor data buffers */
   uchar_t	command;	/* Read/Write/Translate/Verify */
   uchar_t	targ_type;	/* Memory/IO */
   uchar_t	reqr_type;	/* Memory/IO  */
   uchar_t	targ_step;	/* Inc/Dec/Hold  */
   uchar_t	reqr_step;	/* Inc/Dec/Hold  */
   uchar_t	trans_type;	/* Single/Demand/Block/Cascade */
   uchar_t	targ_path;	/* 8/16/32 */
   uchar_t	reqr_path;	/* 8/16/32 */
   uchar_t	cycles;	/* 1 or 2 */
   uchar_t	bufprocess;	/* Single/Chain/Auto-Init */
   char	*procparam;	/* parameter buffer for appl call */
   int	(*proc)();	/* address of application call routines */

The members of the dma_cb structure are:

targbufs

pointer to a list of dma_buf(D4) structures that describes the target of the DMA operation.

reqrbufs

pointer to a list of dma_buf(D4) structures that describes the requestor of the DMA operation.

command

specifies the command for the DMA operation. It may be one of the following values:

DMA_CMD_READ: Specifies a DMA read from the target to the requestor.
DMA_CMD_WRITE: Specifies a DMA write from the requestor to the target.

targ_type and reqr_type

specify the type of the target and requestor, respectively. They each may have one of the following values:

DMA_TYPE_MEM: target (or requestor) is memory.
DMA_TYPE_IO: target (or requestor) is an I/O device.

targ_step and reqr_step

specify how the target and requestor addresses are to be modified after each transfer. They each may have one of the following values:

DMA_STEP_INC: target (or requestor) address is to be incremented following each data transfer.
DMA_STEP_DEC: target (or requestor) address is to be decremented following each data transfer
DMA_STEP_HOLD: target (or requestor) address is to remain the same following each data transfer.

trans_type

specifies the transfer type of the operation. It can have one of the following values:

DMA_TRANS_SNGL: a single transfer is to occur.
DMA_TRANS_BLCK: a block transfer is to occur. This is the only acceptable value for software-initiated transfers.
DMA_TRANS_DMND: demand transfer mode, which is a variation on block transfer in which the requestor may provide additional control flow on the transfer.

targ_path and reqr_path

specify the size of the data path for the target and requestor, respectively. They each may have one of the following values:

DMA_PATH_8: target (or requestor) uses an eight-bit data path.
DMA_PATH_16: target (or requestor) uses a 16-bit data path.
DMA_PATH_32: target (or requestor) uses a 32-bit data path.
DMA_PATH_64: target (or requestor) uses a 64-bit data path.

cycles

an integer that specifies the number of cycles required for each transfer. Its value should be taken from the result of dma_get_best_mode(D3).

bufprocess

specifies how the DMA target buffer structures are to be processed. It is an enumeration that can be set to one of the following values:

DMA_BUF_SNGL: target consists of a single DMA Buffer.
DMA_BUF_CHAIN: target consists of a chain of DMA Buffers. Used only for devices on an EISA bus.

procparam

parameter to be passed to the subroutine specified by the proc member.

proc

specifies the address of a routine to be called when a DMA operation is successfully set up by dma_swsetup(D3). The value of the procparam member is passed as an argument to this routine. This field may be set to NULL if no procedure is to be called.

Applicable hardware

PC-AT compatible platforms with ISA, EISA, or MCA buses

Version applicability

ddi: 1, 2, 3, 4, 5, 5mp, 6, 6mp, 7, 7mp, 7.1, 7.1mp, 8, 8mp

Difference between versions

This structure is expected to be replaced or modified in a future release.

References

dma_buf(D4), dma_free_cb(D3), dma_get_cb(D3), dma_get_best_mode(D3), dma_prog(D3), dma_swsetup(D3), dma_swstart(D3)

``DMA'' in HDK Technical Reference